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- Path: classic.iinet.com.au!news
- From: ianc@iinet.net.au (Ian Caddy)
- Newsgroups: comp.os.os9,comp.sys.m68k
- Subject: Re: 68332 CSBOOT* help?
- Date: 24 Jan 1996 12:39:04 GMT
- Organization: iiNet Technologies
- Message-ID: <4e5998$kmd@classic.iinet.com.au>
- References: <4dkvv8$v65@linux.cpsc.ucalgary.ca>
- NNTP-Posting-Host: grunge170.dy.iinet.net.au
- Mime-Version: 1.0
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-
- In article <4dkvv8$v65@linux.cpsc.ucalgary.ca>, magee@cpsc.ucalgary.ca
- says...
- >
- > Hello all,
-
- <snip>
-
- > I can't seem to figure out how CSBOOT* is mapping the EPROM in the
- '332's
- >address space. The EVS executes Rombug fine at $60000; the start of the
- >EPROM is like this:
- >
- >Offset 00 01 02 03 04 05 06 07 . . .
- >------ -- -- -- -- -- -- -- --
- >$00000 00 00 49 00 00 06 04 c4 ..
- >
- >This means the CPU's initial SP will be $4900, PC will be $6004c4, which
- >works. But HOW does the EVS find the EPROM at $60000 immediately after
- >bootup? My understanding of the 332 is that the EPROM (and all other
- >peripherals hooked up to the chip select lines) must be mapped into
- >memory by the boot code (via the CSAR/CSORs). If this is so, how does
- >the EPROM get up to $60000 at the very start?
- >
- > A local hardware guru we've talked to says that the '332 must execute
- >the EPROM from $0.l after a reset, then the software must remap the
- EPROM
- >afterward if desired.
-
- The local hardware guru is correct that after reset the 332 will get the
- initial stack pointer and program counter address from address 0 to 8.
- When the 332 resets only the CSBOOT is valid and it is valid for from 0
- to 0x0FFFFF with 13 wait states. Now the boot EPROM is much smaller than
- this in your case 1mbit or 128KBytes or from 0 to 0x01FFFF which is a
- subset of the chip select. What happens (or should happen) is that the
- contents of this EPROM are mirrored on the boundaries of 0x020000 so the
- data at address 0 is the same as the data at address 0x020000 and
- 0x040000 and 0x060000 etc. due to the limited amount of address lines
- connected to the EPROM.
-
- So the trick in software is to ORG your code at a high mirrored address
- that is valid when the 332 boots and then at a later stage you can set
- the chip select for CSBOOT to just point to the chosen address, in this
- case 0x060000.
-
- When creating your EPROM files the best thing to do is also ORG your
- vectors at 0x060000 and when the compiler creates an S record file,
- convert it to binary with a base address of 0x060000 or load into your
- EPROM programmer and set the base address to 0x060000.
-
- Hope this resolves your question, if you have any other questions just
- drop me some mail.
-
- Ian Caddy
- IC Systems Pty Ltd
- Perth, West Australia
-
-